The invention relates to apparatus in a computer system for transmitting signals from one processor to one or several other processors connected to the same bus system wherein each processor contains a sender buffer for sending all the signals and a queue buffer for storing signals without priority, so that the signals having priority are transmitted without time delay and that the sequence of signals without priority is not changed.
In computer systems there is a need for exchange of signal information between processors connected to the same bus system. During such a signal exchange the problem arises that the processors treat the signals very rapidly in relation to the delay through the signal transmitting means, so that queues arise. The occurrence of queues will result in worse utilization of the capacity of the processors as they are subject to long periods of waiting.
In order to solve the problem that queues arise in known systems a buffer memory of some kind is used, e.g., as is shown in the Swedish Patent application No. 313.849. The disadvantage of known systems is that no difference is made between signals with no priority and signals having priority when loading them into the sender buffer thus a signal without priority that will be sent to the processor can be waiting and block a signal having priority that will be sent to another processor.
The invention, which solves the mentioned problem, is characterized according to the claims.